1. Field of the Invention
The present invention relates to a data processing apparatus, data processing method, and storage medium, which execute data transfer according to data types in a ring-shaped data transfer channel, which connects a plurality of modules.
2. Description of the Related Art
Conventionally, a data processing apparatus which executes data processing using a plurality of modules connected to a ring-shaped data transfer channel has been proposed (for example, see Japanese Patent Laid-Open No. 11-167560 or 9-091262). In the ring-shaped data transfer channel, each individual module includes a memory used to temporarily store received data. Hence, the data transfer channel can be divided into independent partial transfer channels, and data can be independently transferred between modules. Thus, data that is as many as the number of modules is parallelly transferred, thus enhancing data transfer efficiency.
In Japanese Patent Laid-Open No. 11-167560, data to be transferred has destination information indicating a destination module so as to implement data transfer between modules. In Japanese Patent Laid-Open No. 9-091262, a module ID is changed using an ID register and an ID setting flag, which are used to set an ID for each module, without requiring any dedicated operation circuit and signal lines.
Furthermore, a method of transferring data using a transmission channel which connects modules in series so as to configure functions of a plurality modules has been proposed (for example, see Japanese Patent No. 4359490).
When transfer data (packet) has destination information as in Japanese Patent Laid-Open No. 11-167560, packets have to be generated in correspondence with destinations so as to branch a data path, and generation and transmission of packets as many as the number of branches may lower a processing throughput.
When an ID is set to change a data path under the condition that an ID setting flag of each module is reset as in Japanese Patent Laid-Open No. 9-091262, only a specific data path cannot be switched.
In Japanese Patent No. 4359490, processing elements (corresponding to processing units of modules in the present invention) connected in series are used as a data transfer channel of a memory required to switch configuration information of the processing elements. Then, a data transfer channel to be processed is independently arranged. When there are a plurality of data transfer channels between modules, it is difficult to switch the configurations of modules that is synchronized with processing data, or a synchronization mechanism for that purpose is required.
When a data flow includes branches, and when a value of a register or memory in a module located on a branch destination path is read, a packet transferred in a certain path after the branch can acquire a correct value since a module is connected. However, a packet transferred in another path cannot acquire a correct value. Furthermore, when branched paths are merged again, one of these paths has to be determined. In this case, a packet that acquired a correct value has to be distinguished. Of course, when a register in a module after the paths are merged is a read target, neither packets may hold a correct value. In order to attain this determination, all modules which may serve as merging points of paths are required to have a determination function. Hence, a circuit scale as a whole inevitably increases in correspondence with the determination functions as many as the number of modules. If there is no merging point after a branch, two output destinations from an input/output unit are required. In this case, memory areas as many as the number of branched output destinations are required. Also, memory areas which store correct output results are different depending on paths to which modules belong. For this reason, when a CPU wants to acquire a register read result, it has to search for a memory area which stores a correct result based on a path to which a target module belongs.
Data to be processed has to be transferred between modules in a predetermined order, and a data path used to transfer data may go round on a ring bus or may be branched. Data used to read or write a value of a register or memory need only be transferred to a target module. When the data path includes a round path or branches, data may make an extra round or may be transferred to a branch destination of an unnecessary path, resulting in low processing efficiency.
The present invention provides, in consideration of at least one of the aforementioned problems, a technique which enhances processing efficiency by switching data paths according to data types to be transferred to modules.